Low power configurable multiple function gate, 74LVC1G57XC6G Replace 74LVC1G57GW
74LVC1G57XC6G 74LVC1G57XC6G.pdf
FEATURES

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PIN CONFIGUTION
CROSS
74LVC1G57GW 74LVC1G57GW.pdf

No.13685

FEATURES

 Wide supply voltage range from 1.65 V to 5.5 V

 Overvoltage tolerant inputs to 5.5 V

 High noise immunity

 ±24 mA output drive (VCC = 3.0 V)

 CMOS low power dissipation

 Latch-up performance exceeds 250 mA

 Direct interface with TTL levels

 IOFF circuitry provides partial Power-down mode operation

 Complies with JEDEC standard:

 JESD8-7 (1.65 V to 1.95 V)

 JESD8-5 (2.3 V to 2.7 V)

 JESD8B/JESD36 (2.7 V to 3.6 V).

 ESD protection:

 HBM JESD22-A114F exceeds 2000 V

 MM JESD22-A115-A exceeds 200 V

 Multiple package options

 Specified from -40 °C to +85 °C and -40 °C to +125 °C.

PIN CONFIGUTION
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