SGM48524Q.pdf• AEC-Q100 Qualified for Automotive Applications
Device Temperature Grade 1
• TA = -40℃ to +125℃
• Two Independent Gate Drive Channels
• 4.5V to 18V Single Supply Range (VDD)
• 5A Peak Source/Sink Pulse Current Drive
• Independent Enable Pin for Each Channel
• TTL and CMOS Compatible Logic Threshold
• Logic Levels Independent of Supply Voltage
• Hysteretic Input Logic for High Noise Immunity
• Outputs are Logic Low when Inputs are Floating
• Negative Voltage Handling Capability:
-8V DC at Inputs
-2V, 200ns Pulse for Outputs (OUTx)
• Glitch-Free Operation at Power-Up and Power-
Down: Outputs Pulled Low during Supply UVLO
• Fast Propagation Delays: 18ns (TYP)
• Fast Rise Time: 7ns (TYP)
• Fast Fall Time: 8ns (TYP)
• Delay Matching between Two Channels: 1ns (TYP)
• Channels can be Paralleled for Higher Drive Current
• Available in a Green SOIC-8 Package
• Qualified for Automotive Applications
• AEC-Q100 Qualified With the Following Results
Device Temperature Grade 1
Device HBM ESD Classification Level H2
Device CDM ESD Classification Level C4B
• Industry-Standard Pin Out
• Two Independent Gate-Drive Channels
• 5-A Peak Source and Sink-Drive Current
• Independent Enable Function for Each Output
• TTL and CMOS-Compatible Logic
Threshold Independent of Supply Voltage
• Hysteretic-Logic Thresholds for High-Noise Immunity
• Ability to Handle Negative Voltages (–5 V) at Inputs
• Inputs and Enable Pin-Voltage Levels
Not Restricted by VDD Pin Bias Supply Voltage
• 4.5-V to 18-V Single-Supply Range
• Outputs Held Low During VDD-UVLO,
(ensures glitch-free operation at power-up and power-down)
• Fast Propagation Delays (13-ns typical)
• Fast Rise and Fall Times (7-ns and 6-ns typical)
• 1-ns Typical Delay Matching Between 2-Channels
Ability to Parallel Two Outputs for High-Drive Current
• Outputs Held in LOW When Inputs are Floating
SOIC-8 and MSOP-8 PowerPad™ Package Options
• Operating Temperature Range of –40°C to 140°C
